Media, Communications and Telehealth

Mosaic - Ultra-Low-Latency UHD Multiviewer

Two existing customer products consolidated into an FPGA-based embedded multiviewer with preserved management compatibility, sub-frame latency, and support for tens of HD/UHD sources.

ContextSame confidential broadcast technology company as Project SignalBridge
PeriodDeveloped within the broader Project SignalBridge program
RelationshipTechnical deep dive from the Project SignalBridge product family
Team footprintDeveloped within the relevant Project SignalBridge engineering phase.
FPGA mediaHD/UHD multiviewingSub-frame latencyEmbedded LinuxProduct consolidation

The system

The customer had an embedded FPGA-based broadcast appliance and a separate Windows-server multiviewer. The engineering objective was to move the relevant multiviewer functionality into the FPGA appliance, consolidate media execution in the embedded product, and retain the management workflows operators already understood.

The resulting appliance accepts tens of HD and UHD sources, performs scaling, composition, and multiview processing in the FPGA media path, and produces monitoring outputs with sub-frame latency. It supports both the appliance’s general web administration and the customer’s established desktop multiviewer management environment.

Engineering relationship

Project Mosaic belongs to the same confidential customer and product family as Project SignalBridge. OPTIME analyzed the behavior and integration boundaries of both existing products, then engineered the embedded software, management compatibility, native core, and FPGA-facing integration required to combine them.

It is presented separately because the multiviewer became technically and commercially distinct enough to warrant a focused engineering deep dive. It is not a second, unrelated customer engagement.

Engineering constraints

  • Move relevant functionality from a Windows-server product into an existing embedded FPGA appliance.
  • Preserve the established specialist desktop management workflow without exposing its proprietary control protocol.
  • Extend the general web administration experience with the controls required by the consolidated product.
  • Process tens of mixed HD and UHD sources within the appliance’s available FPGA and embedded resources.
  • Maintain deterministic sub-frame processing latency for live broadcast monitoring.
  • Coordinate frontend, backend, native, embedded Linux, media, and FPGA-facing behavior as one product.

What OPTIME engineered

  • Analysis of the existing embedded appliance and Windows multiviewer product.
  • Migration of relevant multiviewer functionality into the FPGA-based appliance.
  • Compatibility support for the customer’s existing desktop multiviewer administration application.
  • New controls and administration elements in the appliance’s general web UI.
  • JavaScript frontend and Java backend/control-service development.
  • C and C++ native product-core and hardware-facing integration.
  • Embedded Linux, FPGA, and media-processing integration.
  • HD/UHD scaling, composition, layout, output, and multiview processing.
  • Sub-frame latency optimization and compatibility validation across source and output combinations.

Architecture

  1. Two source products

    OPTIME analyzed the Windows multiviewer and the existing FPGA appliance to identify media and control behavior that needed to converge.

  2. Preserved desktop management

    The specialist Windows administration application remained available for multiviewer-specific configuration through a compatible, generalized control boundary.

  3. Extended web administration

    New JavaScript controls and Java services added the required product functions to the appliance’s normal management experience.

  4. Embedded backend and native core

    Java, C, and C++ coordinated device state, layouts, media behavior, and hardware-facing operations inside the appliance.

  5. FPGA media processing

    Scaling, composition, and multiview execution moved into the embedded programmable-logic media path.

  6. HD/UHD multiview outputs

    Tens of source signals were arranged into monitoring layouts and emitted with sub-frame processing latency.

Key engineering decisions

Consolidate execution in the embedded appliance

Instead of maintaining multiview processing as a separate Windows-server media product, OPTIME moved the relevant functionality into the existing FPGA appliance.

Preserve specialist operator workflows

The customer’s established desktop administration application remained useful, while the appliance’s web interface gained the additional controls required by the combined product.

Use FPGA processing for live multiview latency

Scaling, composition, and output processing were engineered in the embedded FPGA environment to maintain deterministic sub-frame latency across tens of HD/UHD sources.

Product consolidation and commercial outcome

Mosaic transformed capabilities distributed across two existing products into one embedded multiviewer appliance. The work preserved operator familiarity while reducing the need to keep media execution in a separate Windows-server product.

The integrated capability was commercialized by the customer as a distinct product and selected for use in major sporting-event environments. Customer, event, deployment-count, and release details remain confidential.

Verified capability

The FPGA-based implementation handles tens of HD and UHD sources with sub-frame processing latency, embedded media composition, preserved specialist desktop management, and extended web administration.

Verified result

The combined embedded multiviewer became a separate commercial product within the customer’s portfolio and was selected for major sporting-event environments.

Verified metrics

Processing latency

Sub-frame

The embedded FPGA media path completes multiview processing in less than one video frame.

Source scale

Tens of HD/UHD sources

The appliance processes tens of high-definition and ultra-high-definition source signals.

Technology & Engineering Role

C / C++
Embedded product core, media logic, and hardware-facing integration.
Java
Backend and device-control services.
JavaScript
Web administration and newly added appliance controls.
Embedded Linux
Runtime environment for the consolidated FPGA appliance.
FPGA
Low-latency scaling, composition, and multiview execution.
Existing Windows desktop application
Preserved specialist management environment for multiviewer functionality.
Web administration
General device administration and controls added for the new capability.

Related engineering

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